Low Power Speech Recognition

Low Power Speech Recognition

Dr. Paul D. Franzon

paulf@ncsu.edu

919.515.7351, fax. 919.515.2285
www.ece.ncsu.edu/erl/faculty/paulf.html

Brief Description

The goal of this project is to build ICs and FPGAs that dramatically decrease the power consumed in speech recognition, so as to enable high-quality battery-powered speech recognition and translation.

Selected Publications

·                D. Chandra, U. Pazhayaveetil, P.D. Franzon, “Architecture for Low Power Large Vocabulary Speech Recognition,” in Proc. IEEE Int. SOC Conference, Sept. 2006, pp. 25-28. paper

via ece.ncsu.edu

http://www.ece.ncsu.edu/erl/faculty/paulfwww/Research/Speech.htm